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b1ackmai1er avatar b1ackmai1er commented on September 23, 2024

Hi Hector,

I resolved my issues by adding CSEG prior to my .phase statements and specifying a load parameter in the DR Link80. i.e.

CSEG
.PHASE	FTH_LOC
.... code
.DEPHASE

from: zx link -CAMEL80.BIN=CAMEL80
to: zx link -CAMEL80.BIN[L200]=CAMEL80

Is this the correct behavior and the old behavior incorrect? Your change notes seem to imply this but I am sure.

Thanks.

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hperaza avatar hperaza commented on September 23, 2024

Hi Phil,

Sorry for not answering earlier, for some reason GitHub is not sending me notifications about Issues.

I just uploaded a fix for the .PHASE problem; the bug was introduced by the code that tried to keep L80 happy, and now CAMEL80 compiles and links properly.

Let me know if it works for you.

Best regards,
Hector.

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b1ackmai1er avatar b1ackmai1er commented on September 23, 2024

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b1ackmai1er avatar b1ackmai1er commented on September 23, 2024

Thanks Hector, all seems to be fine.

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