fpgamaster-wyc Goto Github PK
Name: FPGAmaster
Type: User
Bio: 主要做FPGA教学和项目分享,我对FPGA领域非常感兴趣,多年来一直在研究和学习各种FPGA知识与技能。我会在博客中分享学习FPGA所需要的理论知识、实用技巧与项目实践等内容,帮助广大FPGA爱好者更轻松地入门和提高。如果你对FPGA也感兴趣,欢迎关注我的博客,一起学习和交流。
Name: FPGAmaster
Type: User
Bio: 主要做FPGA教学和项目分享,我对FPGA领域非常感兴趣,多年来一直在研究和学习各种FPGA知识与技能。我会在博客中分享学习FPGA所需要的理论知识、实用技巧与项目实践等内容,帮助广大FPGA爱好者更轻松地入门和提高。如果你对FPGA也感兴趣,欢迎关注我的博客,一起学习和交流。
在4ev开发板,实现VCU功能,FPGA程序
在4ev开发板,实现VCU功能,petalinx程序
7ev开发板,VCU开发,FPGA工程
7ev开发板,实现vcu功能的petalinux程序
为了方便工作,提供的几个例子、模板、技巧
使用p701开发板,用lvds1,产生红外地平议数据
记录在学习petalinux的时候整理的教程
接受LVDS数据,并输出sof,eof,sol,eol
ov5640摄像头,HLR12-6SS 雷达模块
自我介绍,素材库
测试仓库
UART协议发送接收,UART发送数据格式
verilog通用模块,一些平常经常调用的小模块
用Git管理,vivado工程的模板文件夹和tcl脚本文件
xdma读写ddr最小模板设计,不添加任何处理,只用来测试DDR和XDMA
测试写入DDR模块
zynq搭载xenomai实时操作系统,zc706
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