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followers: 29.0 following: 2.0 repos: 20.0 gists: 0.0

Name: Del Hatch

Type: User

Bio: Electrical engineer, with an emphasis in digital logic design. I am on LinkedIn. Verilog. FPGA. Altera. Xilinx. Zynq. AXI. [email protected]

Location: Seattle, WA

Del Hatch's Projects

des_decrypt

C code DES decryption. Takes an encrypted file along with a file containing a DES key, and outputs the plaintext file.

esp32_to_primex

For a Primex transmitter, uses an ESP32 to simulate the GPS receiver. Connects to NTP to get the time.

esp32_to_sma

ESP32 connects to SMA Sunny Boy inverter over Bluetooth

falling-time-clock

A clock that displays the numbers as physical falling numbers.

flipdot_video

Video streaming from a camera to a 58x24 pixel flipdot display. See the two flipdot_display*.mp4 videos. All processing in Verilog RTL (no softcore uP).

iir_eq

IIR audio filter in Verilog, running on Zedboard. Fractional integer coefficients.

mandel_hls

Using Vivado HLS to create floating point IP, used to accelerate a Zynq system. Multiple engines are instantiated.

multi_iir

Multi-band IIR filter in Verilog. Uses time-domain multiplexing of a single, fixed-point, IIR filter to create a 27-band filter.

pipod

From PiPod_Zero2W -- w/ major overhaul of the GUI functions to operate more like the Sony NWZ-A17 media player.

pipod_epaper

PiPod MP3 player with a 250 × 122 e-Paper screen

pipod_zero2w

Modifying the PiPod project for the Pi Zero 2 W.

FPGA paramatized mandelbrot generator. I have tested instantiating 4, 8, and 12 calculating engines. It has a built-in VGA controller (at 640x480) with internal dual-port RAM as the frame buffer. With 4 engines it runs at 100 MHz (5 frames/sec). With 12 engines, at 112 MHz, it hits 20.5 frames/sec.

red_tracker

Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. See the video. Pure Verilog. (No soft-core processor.)

spectrum

Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions. Nios just reads the FFT result and draws the display bars. VGA frame buffer on-chip. VGA signals generated on-chip. See the included video files to watch it in action.

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Del Hatch's Projects

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