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cnlohr avatar cnlohr commented on May 22, 2024

(Memory writing of code)

from ch32v003fun.

dwillmore avatar dwillmore commented on May 22, 2024

Is this related to debugging? Because there's no caches on this chip, so the only things you could be fighting with memory fences would be prefetch queues, etc.

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cnlohr avatar cnlohr commented on May 22, 2024

I have not yet had an issue when debugging, but when I modified code in RAM, it was required. There is definitely some kind of cache.

https://github.com/cnlohr/ch32v003fun/blob/master/examples/self_modify_code/self_modify_code.c#L50

Without this line, things don't work right.

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jnk0le avatar jnk0le commented on May 22, 2024

Fetch of next instruction happens before the store is commited, most likely.

Shouldn't it be fence.i, btw?

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cnlohr avatar cnlohr commented on May 22, 2024

I will have to experiment to see what is required.

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cnlohr avatar cnlohr commented on May 22, 2024

It looks like this has not been and likely will not be an issue. I was worried something may be janky with debugging.

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