Comments (2)
clausecker
commented on June 20, 2024
1
Implemented this idea. Thanks a lot!
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clausecker
commented on June 20, 2024
Thanks for the contribution! I've just benchmarked it and it seems to give a decent 4–5% improvement on my Intel(R) Celeron(R) CPU G1610T @ 2.30GHz box:
name old speed new speed delta
Count8/sse2/1000-2 7.30GB/s ± 0% 7.51GB/s ± 0% +2.84% (p=0.000 n=9+9)
Count8/sse2/10000-2 9.10GB/s ± 0% 9.56GB/s ± 0% +5.10% (p=0.000 n=10+10)
Count8/sse2/100000-2 9.71GB/s ± 0% 10.23GB/s ± 0% +5.36% (p=0.000 n=9+11)
Count8/sse2/1000000-2 9.75GB/s ± 0% 10.25GB/s ± 0% +5.13% (p=0.000 n=11+11)
Count8/sse2/10000000-2 8.98GB/s ± 1% 9.36GB/s ± 1% +4.24% (p=0.000 n=11+11)
Count8/sse2/100000000-2 8.94GB/s ± 0% 9.29GB/s ± 0% +3.93% (p=0.000 n=11+9)
Count16/sse2/1000-2 7.16GB/s ± 0% 7.31GB/s ± 0% +2.10% (p=0.000 n=11+11)
Count16/sse2/10000-2 9.07GB/s ± 0% 9.42GB/s ± 0% +3.84% (p=0.000 n=11+9)
Count16/sse2/100000-2 9.70GB/s ± 0% 10.23GB/s ± 0% +5.47% (p=0.000 n=10+10)
Count16/sse2/1000000-2 9.74GB/s ± 0% 10.26GB/s ± 1% +5.34% (p=0.000 n=10+11)
Count16/sse2/10000000-2 8.97GB/s ± 1% 9.36GB/s ± 1% +4.29% (p=0.000 n=11+11)
Count16/sse2/100000000-2 8.92GB/s ± 1% 9.28GB/s ± 0% +4.04% (p=0.000 n=11+11)
Count32/sse2/1000-2 7.01GB/s ± 0% 7.20GB/s ± 0% +2.68% (p=0.000 n=11+11)
Count32/sse2/10000-2 9.06GB/s ± 0% 9.48GB/s ± 0% +4.66% (p=0.000 n=9+11)
Count32/sse2/100000-2 9.69GB/s ± 0% 10.21GB/s ± 0% +5.34% (p=0.000 n=9+11)
Count32/sse2/1000000-2 9.74GB/s ± 1% 10.26GB/s ± 1% +5.37% (p=0.000 n=11+11)
Count32/sse2/10000000-2 8.98GB/s ± 1% 9.34GB/s ± 1% +4.07% (p=0.000 n=11+11)
Count32/sse2/100000000-2 8.92GB/s ± 0% 9.28GB/s ± 0% +4.00% (p=0.000 n=11+11)
Count64/sse2/1000-2 6.72GB/s ± 0% 6.85GB/s ± 0% +1.98% (p=0.000 n=9+11)
Count64/sse2/10000-2 9.00GB/s ± 0% 9.43GB/s ± 0% +4.84% (p=0.000 n=9+10)
Count64/sse2/100000-2 9.69GB/s ± 0% 10.20GB/s ± 0% +5.30% (p=0.000 n=9+11)
Count64/sse2/1000000-2 9.75GB/s ± 0% 10.25GB/s ± 0% +5.17% (p=0.000 n=10+11)
Count64/sse2/10000000-2 8.97GB/s ± 0% 9.34GB/s ± 1% +4.04% (p=0.000 n=11+11)
Count64/sse2/100000000-2 8.92GB/s ± 0% 9.27GB/s ± 0% +3.85% (p=0.000 n=9+8)
However, it also reduces performance by 4–8% on my Intel(R) Core(TM) i7-4910MQ CPU @ 2.90GHz machine:
Count8/sse2/1000-8 11.6GB/s ± 1% 10.6GB/s ± 8% -8.31% (p=0.000 n=10+11)
Count8/sse2/10000-8 14.5GB/s ± 1% 13.7GB/s ± 7% -5.21% (p=0.001 n=11+11)
Count8/sse2/100000-8 15.4GB/s ± 2% 14.4GB/s ±11% -6.09% (p=0.001 n=11+11)
Count8/sse2/1000000-8 15.6GB/s ± 1% 14.7GB/s ± 7% -5.35% (p=0.002 n=10+11)
Count8/sse2/10000000-8 15.1GB/s ± 0% 14.0GB/s ±11% -7.05% (p=0.001 n=9+11)
Count8/sse2/100000000-8 13.8GB/s ± 1% 13.1GB/s ± 8% -4.70% (p=0.001 n=11+11)
Count16/sse2/1000-8 11.4GB/s ± 1% 10.4GB/s ± 3% -8.78% (p=0.000 n=10+10)
Count16/sse2/10000-8 14.4GB/s ± 1% 13.5GB/s ± 7% -6.32% (p=0.000 n=11+10)
Count16/sse2/100000-8 15.5GB/s ± 1% 14.5GB/s ± 5% -6.04% (p=0.000 n=10+10)
Count16/sse2/1000000-8 15.5GB/s ± 1% 14.5GB/s ± 9% -6.95% (p=0.001 n=10+11)
Count16/sse2/10000000-8 14.9GB/s ± 2% 14.2GB/s ±10% -5.25% (p=0.003 n=11+11)
Count16/sse2/100000000-8 13.8GB/s ± 1% 13.3GB/s ± 3% -3.93% (p=0.000 n=11+10)
Count32/sse2/1000-8 11.2GB/s ± 2% 10.4GB/s ± 4% -7.46% (p=0.000 n=11+10)
Count32/sse2/10000-8 14.4GB/s ± 1% 13.6GB/s ±11% -5.64% (p=0.002 n=10+11)
Count32/sse2/100000-8 15.4GB/s ± 2% 14.8GB/s ±11% -4.05% (p=0.004 n=11+11)
Count32/sse2/1000000-8 15.5GB/s ± 2% 14.9GB/s ±11% -3.63% (p=0.034 n=11+11)
Count32/sse2/10000000-8 14.9GB/s ± 2% 14.6GB/s ± 8% -2.62% (p=0.023 n=11+11)
Count32/sse2/100000000-8 13.8GB/s ± 1% 13.5GB/s ± 6% -2.70% (p=0.013 n=11+11)
Count64/sse2/1000-8 10.7GB/s ± 0% 9.5GB/s ±12% -10.99% (p=0.000 n=10+11)
Count64/sse2/10000-8 14.3GB/s ± 2% 13.5GB/s ± 6% -5.35% (p=0.001 n=11+10)
Count64/sse2/100000-8 15.5GB/s ± 0% 14.6GB/s ± 8% -5.41% (p=0.016 n=9+11)
Count64/sse2/1000000-8 15.6GB/s ± 0% 14.6GB/s ± 9% -6.63% (p=0.002 n=9+10)
Count64/sse2/10000000-8 15.0GB/s ± 1% 13.9GB/s ± 8% -7.73% (p=0.000 n=11+10)
Count64/sse2/100000000-8 13.7GB/s ± 1% 13.1GB/s ± 9% -4.39% (p=0.001 n=11+10)
I believe the key difference lies indeed in that one of the two might rename SSE registers while the other doesn't. Perhaps it is possible to reschedule the CSA cascade such that none of the results needs to be available early. We do get an extra register worth of breathing room from this, so it might not be as complex as it seems. I'll have to think about it.
Being able to fuse a load with one of the exclusive or operations is another interesting possibility. I'll have to benchmark it.
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