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Fun fact: Playing with 1s and 0s.
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Skills: RTL Coding, RISC-V, Verilog (HDL), System Verilog (HVL), C, Python, UVM Framework.
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Certifications: Siemens EDA System Verilog and UVM Certified & Red Hat Certified System Administrator (RHCSA v8.0).
amrit-raj-official Goto Github PK
Name: Amrit Raj
Type: User
Company: Member at RISC-V International
Bio: Domain : VLSI Frontend | Digital Design and Verification | RTL Coding | EEE at BIT Mesra.
Location: BIT Mesra, Jharkhand, India