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armv6m-sim

Simple instruction set simulator for ARMv6-M (Cortex M0)

biriscv

32-bit Superscalar RISC-V CPU

cleanflight

Clean-code version of the baseflight flight controller firmware

cores-swervolf

FuseSoC-based SoC for SweRV EH1

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

dromajo

RISC-V RV64GC emulator designed for RTL co-simulation

exactstep

Instruction accurate instruction set simulator for RISC-V, MIPS and ARM-v6m

f32c

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

fgpu

FGPU is a soft GPU architecture general purpose computing

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

fusesoc-cores

FuseSoC standard core library

gplgpu

GPL v3 2D/3D graphics engine in verilog

hellfireos

HellfireOS Realtime Operating System

hf-risc

HF-RISC SoC

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

lenet_cnn

The convolutional neural network LeNet by Yann LeCun. This example tests the weights provided in 4 byte data type with smaller data types (short/ char) in order to test the implemetation in a micro-controller.

linker-map-summary

Summarizes the size of objects linked into a binary based on the linker map.

miaow

An open source GPU based off of the AMD Southern Islands ISA.

mrisc32

MRSIC32 ISA documentation and development

nyuziprocessor

GPGPU microprocessor architecture

open-gpgpu-flexgrip-

FlexGripPlus: an open-source GPGPU model for reliability evaluation and simulation

opentitan

OpenTitan: Open source silicon root of trust

optimsoc

OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores

orca-mpsoc

This repository holds the hardware project for the ORCA MPSoC platform.

orca-risc-v

RISC-V by VectorBlox

orca-sim

A Simulator for ORCA Platform made on top of URSA Engine.

orca-software-tools

ridecore

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

riscv-gnu-toolchain-docker

Dockerfile for RISC-V GNU Compiler Toolchain

riscv_vhdl

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators