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  • šŸ‘‹ Hi, Iā€™m @alokvishwa10
  • šŸ‘€ Iā€™m interested in Digital VLSI design and Verification, IP verification and SOC level verification.
  • šŸ˜Ž I am Proficient in Digital Electronics, Verilog, SystemVerilog, UVM, PERL Scripting, LINUX & UNIX commands, VIM Editor, C language, AMBA protocols and SPI - UART - I2C protocols
  • šŸŒ± Completed my Masters' in Microelectronics form IIIT Allahabad
  • šŸ’žļø Iā€™m looking to collaborate on New designs, Verification projects, Protocols.
  • šŸ’° Currently seeking opportunities to enter the VLSI industry, Learn from experts and Explore new possibilities.
  • šŸ“« Reach me at [email protected] or DM me at https://www.linkedin.com/in/alok-vishwakarma-7732b41b0/

Alok Vishwakarma's Projects

32-bit-risc-processor icon 32-bit-risc-processor

This repo has all the files needed for simulation of a 32-bit RISC processor, which is built based on 5 stages of pipeline that can handle Arithmetic, logical and load-store operations for now.

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