597152515 Goto Github PK

action_openwrt_xiaomi_r4agv2

Xiaomi R4AGv2 Gigabit Router OpenWrt Breed Flash 小米路由器R4Av2千兆版 (使用于新版闪存芯片)

bobe

cores-veer-eh1

VeeR EH1 core

cvpr2024-papers-with-code

CVPR 2024 论文和开源项目合集

ddr5_phy

DDR5 PHY Graduation project (Verification Team) under supervision of Si-Vision

ddr5_phy_writeoperation

digital-ide

all in one vscode plugin for Verilog/VHDL development

fpga-usb-device

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-disk, USB-keyboard, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

infinite-isp_fpgabinaries

Infinite-ISP Image Signal Processing Pipeline FPGA Binaries for XCK26 Zynq® UltraScale+™ MPSoC present on Xilinx® Kria™ KV260 Vision AI Starter Kit.

maplestory-bot

mi-r4a-breed-openwrt

小米4A千兆版breed直刷版

microshift_compression

Microshift Compression: An Efficient Image Compression Algorithm for Hardware

openwrt-packages

openwrt常用软件包

openwrt_x86-r2s-r4s-r5s-n1

一分钟在线定制编译 X86/64, NanoPi R2S R4S R5S R6S, 斐讯 Phicomm N1 K2P, 树莓派 Raspberry Pi, 香橙派 Orange Pi, 红米AX6, 小米AX3600, 小米AX9000, 红米AX6S 小米AX3200, 红米AC2100, 华硕ASUS, 网件NETGEAR 等主流软硬路由

padavan-build

Padavan 自动编译

proj87-picorio-rv64cpu

pulpino__spi_master__ip_verification

To verify the SPI Master IP using the APB and SPI AVIPs

riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

riscv-superscalar--blaze-core

A completely configurable RISC-V Out of Order Core with a base model geared towards maximizing performance

riscv-tests

riscv2os

從 RISC-V 處理器到 UNIX 作業系統

small-package

自动同步更新上游库软件

sp_devkit_zynq7010-20

ZYNQ7010-20 开源开发板，经济实惠好吃不贵

step_into_mips

一步一步写MIPS CPU

super-miyamoto-sprint

Homebrew game for homebrew FPGA game console

superscalar-riscv-cpu

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

verigpu

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

verilog-axi

Verilog AXI components for FPGA implementation

vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

wav-lpddr-hw

Wavious DDR (WDDR) Physical interface (PHY) Hardware