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0x3a3's Projects

32-bit-cpu icon 32-bit-cpu

The engineering of a 32-bit Central Processing Unit (CPU) in VHDL for an FPGA board. Intel Quartus was used for schematic designing, testing, and debugging.

benchbase icon benchbase

Multi-DBMS SQL Benchmarking Framework via JDBC

fast_algorithm_fps_ssa icon fast_algorithm_fps_ssa

Implement F-DST to solve 2-D PDE(fast poisson solver) and FFT to compute Multiplication algorithm(Schönhage–Strassen algorithm) with C

hdlconvertor icon hdlconvertor

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

lead-lag icon lead-lag

Estimation of the lead-lag parameter from non-synchronous data.

metagen icon metagen

Code for the paper "Learning to Prove Theorems by Learning to Generate Theorems"

nsncd icon nsncd

nscd-compatible daemon that proxies lookups, without caching

pyfactorise icon pyfactorise

Python implementation of the Self Initialising Quadratic Sieve

snap icon snap

Stanford Network Analysis Platform (SNAP) is a general purpose network analysis and graph mining library.

sparrow icon sparrow

Sparrow scheduling platform (U.C. Berkeley).

thundergp icon thundergp

HLS-based Graph Processing Framework on FPGAs

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